I love the pin level emulation model of this. The self contained modular behaviour of components has real flexibility.
For a long time I have wondered if extremely thin but explicitly defined interfaces are an under-explored domain for interoperability.
Beyond simple chip emulation, any set of values that are sampled on each side of the interface at defined times, and a small set of signals to provided temporal access. Be it pins, a small set of registers, or a memory mapped region, it seems like an excellent target for conformance testing.
Perhaps in a world of AI generated code, modular components with explicit conformance requirements would allow people to not care what happens inside the black box, provided it cannot be made to violate it's behaviour requirements.
For a long time I have wondered if extremely thin but explicitly defined interfaces are an under-explored domain for interoperability.
Beyond simple chip emulation, any set of values that are sampled on each side of the interface at defined times, and a small set of signals to provided temporal access. Be it pins, a small set of registers, or a memory mapped region, it seems like an excellent target for conformance testing.
Perhaps in a world of AI generated code, modular components with explicit conformance requirements would allow people to not care what happens inside the black box, provided it cannot be made to violate it's behaviour requirements.